|کد مقاله||سال انتشار||مقاله انگلیسی||ترجمه فارسی||تعداد کلمات|
|107088||2017||54 صفحه PDF||سفارش دهید||محاسبه نشده|
Publisher : Elsevier - Science Direct (الزویر - ساینس دایرکت)
Journal : Journal of Parallel and Distributed Computing, Available online 2 December 2017
The design of processor platforms comprised of multiple cores has been subject of dramatic changes in the last years. Mainly due to physical constraints imposed by increases in leakage current stemming from shrinking dimensions in transistor manufacturing processes. Such constraints have brought forth what we know as âdark siliconâ, the area of a chip which should be turned off or work on a minimum clock frequency to meet the power dissipation constraints. The technical challenge has been how to choose the hardware blocks (type and number) to meet all chip design constraints and goals. This work introduces a less conservative dark silicon estimate based on chip components power density and technological process and a technique that performs the design space exploration aware of the dark silicon constraints. Our design space exploration technique is built on the top of a multiobjective optimization model and it adopts the NSGA-II genetic algorithm to provide solutions (platforms) aware of the dark silicon. The technique has been validated and evaluated along with a brute force algorithm. Our experimental results show dark silicon chip percentages up to 13.61% leading to a chip area of 134mm2 which is tantamount to three cores area on the chip. The experiments comparing our DS-DSE performance to the brute force algorithm have shown that our strategy presents more performance scalability as the design space exploration (IP cores database) is increased.