|کد مقاله||سال انتشار||مقاله انگلیسی||ترجمه فارسی||تعداد کلمات|
|140461||2018||9 صفحه PDF||سفارش دهید||4038 کلمه|
Publisher : Elsevier - Science Direct (الزویر - ساینس دایرکت)
Journal : Karbala International Journal of Modern Science, Available online 26 March 2018
This paper presents the design of a low phase noise voltage controlled oscillator (VCO), which offers higher transconductance (gm) by the use of parallel MOSFETs. Here, two NMOS transistors are connected in parallel with the cross-coupled NMOS transistors of a conventional cross-coupled VCO. So, the total negative conductance offered to the circuit to cancel out the parasitic resistance of the LC-tank is increased. This negative conductance is achieved without dealing with larger transistor size or any other passive elements. Hence, power dissipation and silicon area are reduced. Further, dynamic threshold MOSFET (DTMOS) with a capacitive division technique is implemented to increase the voltage swing, leading to a further decrease in phase noise. The proposed VCO is designed and simulated in UMC 180Â nm technology. It achieves a tuning range of 1.58â1.60Â GHz about 200Â MHz, with 6.09Â mW power consumption at 1.1Â V supply voltage. The phase noise is obtained â40.6 dBc/Hz at 1Â kHz and â120.44 dBc/Hz at 1Â MHz respectively. So, it should be used in transceiver and PLL blocks for low voltage and low phase noise applications.