یک مدل کلی برای خصوصیات و طراحی سیستم های جاسازی شده زمان واقعی
|کد مقاله||سال انتشار||مقاله انگلیسی||ترجمه فارسی||تعداد کلمات|
|7184||2003||12 صفحه PDF||سفارش دهید||7020 کلمه|
Publisher : Elsevier - Science Direct (الزویر - ساینس دایرکت)
Journal : Microelectronics Journal, Volume 34, Issue 11, November 2003, Pages 989–1000
Design of complex embedded systems feasible with current and upcoming semiconductor technologies necessitates consideration of real-time from the beginning. However, the commonly used specification techniques do not consider temporal aspects in general like fulfillment of high level timing requirements or dynamic reactions on timing violations. In this paper, we discuss the restrictions of current specification techniques for embedded real-time systems and present a general time model that solves this issue. The time model contains the progress of time, the measurement of time and the specification of timing requirements based on event traces. In contrast to earlier techniques, preconditions determine the actual relevance of a specific timing bound. Exemplified for SDL, a solution for the specification of temporal aspects is shown. The advantages of this solution are discussed in a hardware/software co-design case study from the mobile communication area.
The high transistor count of modern VLSI chips makes it feasible to increase the functionality of embedded systems. This enables the integration of complete systems like cellular phones or mechatronic systems on a single chip. The design process of such real-time systems has to cover many different aspects: VLSI design of the complete system architecture, embedded real-time software design, simulation and verification of the system's hardware and software, rapid-prototyping of the whole system, and a validation in the real environment. Finally, the system has to be partitioned into hardware and software in a way that minimizes costs while fulfilling all requirements. Such complex tasks require a specification language that allows for automated implementation and verification of functional and temporal behaviour of the real-time system. Furtheron, system synthesis, i.e. the optimized decision on which parts to map to hardware and on which parts to map to software, is only possible with a system-level specification language like, for example SDL , as it is used in Ref. . However, SDL as well as other system-level specification languages, does not allow the specification of complex temporal behaviour, like reaction time or actions triggered at a specific point in time. Temporal behaviour can be expressed by the use of events where an event marks a point in the specification. A simple requirement is that the interval of time between event e1 (the signal from the crash sensor) and event e2 (the activation of the airbag) must be less then 30 ms under any circumstances. Such a timing behaviour only uses a so-called timing bound. More complex requirements consider an additional precondition, e.g. send a data packet every 10 ms, but only if a data packet is available. In real-time systems, the specified timing requirements have to be met. This requires a mechanism to quantify the progress of time which usually is carried out with a clock. As with all physical measuring instruments, the parameters of a clock deviate from their ideal values. The most important ones are drift, granularity and offset, and may vary with time. So, a specification technique should allow for specifying the parameters of the clock device, especially in a real-time environment. Modern communication systems like GSM or UMTS even amplify time related design problems. Since they consist of several devices (the mobiles and the base station) they also implement several clocks. Even if these clocks are driven by crystal oscillators from the same production charge, they are not exactly the same. A specification technique that claims to be usable for real-time systems must allow to specify all necessary parameters of the clocks used. An alternative would be to support the designer in deciding how good the synchronization scheme needs to be in order to keep the different mobiles synchronized. Reliable system design requires reproducible results for the major system properties. Thus, the properties of clocks for measuring time has to be specified with the same precision as the quality of voltage meters. All the related issues can only be handled with an adequate model of time that we present in Section 3. An overview of the possibilities of specification techniques currently used in the area of real-time systems with respect to their model of time is given in Section 2. Specific examples of how to integrate the presented time model in these specification techniques is shown in Section 4. Section 5 finally presents an application example of a large DECT fixed part to prove the usability of the formal time model.
نتیجه گیری انگلیسی
The ability to precisely specify of timing aspects is important in the development of communication systems with QoS requirements, like mobile telephone systems. In this paper, a new approach for extending SDL, a widely used language for the specification of such systems, with the ability for specifying timing aspects is presented. This formal time model consists of clocks and timing constraints. With the presented approach, a synchronous medium access can be specified, and it is possible to specifiy the sending of signals at a particular point of time. We have shown the necessity of the presented approach as well as its feasibility by means of a case study where a DECT MAC layer was implemented using the new extensions to SDL. SDL itself is used as an example in this paper. The concepts can be transformed with moderate effort to other specification languages as well.