دانلود مقاله ISI انگلیسی شماره 9848
عنوان فارسی مقاله

مطالعات شبیه سازی تصادفی مقاومت مولکولی برای گره تکنولوژی 32 نانومتری

کد مقاله سال انتشار مقاله انگلیسی ترجمه فارسی تعداد کلمات
9848 2008 6 صفحه PDF سفارش دهید محاسبه نشده
خرید مقاله
پس از پرداخت، فوراً می توانید مقاله را دانلود فرمایید.
عنوان انگلیسی
Stochastic simulation studies of molecular resists for the 32 nm technology node
منبع

Publisher : Elsevier - Science Direct (الزویر - ساینس دایرکت)

Journal : Microelectronic Engineering, , Volume 85, Issues 5–6, May–June 2008, Pages 949-954

کلمات کلیدی
مقاومت مولکولی - لیتوگرافی با وضوح بالا - شبیه سازی فرآیند -
پیش نمایش مقاله
پیش نمایش مقاله مطالعات شبیه سازی تصادفی مقاومت مولکولی برای گره تکنولوژی 32 نانومتری

چکیده انگلیسی

Experiments and simulations suggest that low-molecular-weight resist materials could result in low line-edge roughness (LER) which is a critical parameter for the forthcoming technology nodes. Two positive molecular resist architectures are modeled with a stochastic lithography simulator and their LER behavior is quantified. The corresponding LER values obtained are less than 1nm, suggesting that such materials are promising for the fabrication of devices even down to the 32 nm node. Two-dimensional lattices with the molecular resist architectures are created and combined with the stochastic lithography simulator and a simple etching modeling algorithm, in order to test the transferred line-width roughness (LWR) on the gate region of the pMOS and nMOS transistors of an inverter cell designed with 40 nm nominal gate length. The role of the molecular resist architecture on the final LWR of transistor gate is discussed.

مقدمه انگلیسی

The influence of resist material and its architecture becomes important in the sub 45 nm patterning scale. Experiments and simulations [1], [2], [3], [4] and [5], have shown that low-molecular-weight resist materials could result in low line-edge roughness (LER) which is a critical parameter for the forthcoming technology nodes. In this work a stochastic lithography simulation [3], [4] and [5] is combined with an electron-beam lithography module [6] and [7], and both are applied for simulating a CMOS inverter gate layout, design with 32 nm design rules. The drawn gate length under the pMOS and nMOS transistor regions is 40 nm. The objective is to model molecular resist architectures throughout lithography and etching taking into account fine details such as critical dimension (CD) and line-width roughness (LWR). Particular consideration is given on the effects of material molecular type, and acid diffusion conditions. Fig. 1 shows a qualitative representation of the modelling/simulation flow. Section 2 discusses the modelling methodology, while on Section 3 the simulation results are presented and discussed.

نتیجه گیری انگلیسی

Molecular resists are promising for next device generation fabrication if acid diffusion is maintained minimum using high PAG concentration. Among molecular resists with comparable radius of gyration, the one with the more conformations is better for minimum LER, due to its more compact packing. In this case M17 architecture is preferred, because it is more “flexible”. Preliminary 3D simulation results for Μ21 and M17 molecular models, showed LER (3σ) ≈ 0.5 nm. In 2D simulations the corresponding LER values are approximately 30% higher due to the limited conformation space available to the molecule models. The current methodology could deliver CD and LER/LWR metrology on a realistic layout, rather than model resist lines. It shows that gate etching reduces high frequency roughness, but for high reduction in LWR, CD increases. However, this could be used in advantage if the initial nominal CD is less than the desired, and etching is used to make it wider while concurrently decreasing the edges roughness.

خرید مقاله
پس از پرداخت، فوراً می توانید مقاله را دانلود فرمایید.