دانلود مقاله ISI انگلیسی شماره 138208
ترجمه فارسی عنوان مقاله

بهبود قابلیت های ماسک سخت و لیتوگرافی با بهینه سازی پوشش گام کربن آمورف در الگوی عرض نسبت ابعاد

عنوان انگلیسی
Hard mask and lithographic capabilities improvement by amorphous carbon step coverage optimization in high aspect ratio device pattern
کد مقاله سال انتشار تعداد صفحات مقاله انگلیسی
138208 2018 7 صفحه PDF
منبع

Publisher : Elsevier - Science Direct (الزویر - ساینس دایرکت)

Journal : Vacuum, Volume 153, July 2018, Pages 267-273

پیش نمایش مقاله
پیش نمایش مقاله  بهبود قابلیت های ماسک سخت و لیتوگرافی با بهینه سازی پوشش گام کربن آمورف در الگوی عرض نسبت ابعاد

چکیده انگلیسی

Due to the complexity of micro control unit (MCU), the fabrication process of MCU has become very challenging, and in particular the hard mask (HM) and lithographic technologies. Therefore, it is very important to improve the performance of the two processes. The performances of the HM and lithographic processes strongly depend on the step coverage (S/C) of HM. Poor HM S/C will directly impact the protection provided by HM on device patterning during the etching process and overlay marks during photoresist (PR) rework. The application of C2H2 base amorphous carbon (a-C) to form the HM instead of C3H6 base a-C can achieve better sidewall and bottom S/C due to the fact that C2H2 base a-C has superior sticking coefficient (higher carbon to hydrogen (C/H) ratio). Furthermore, the silicon (Si) center damaging problem in device patterning is alleviated by the good S/C performance of C2H2 base a-C. Experimental results have demonstrated that the overlay mark is not damaged with five PR reworks with the application of C2H2 base a-C. Furthermore, a process parameter design of experiment (DOE) for C2H2 base a-C to obtain the trends of sidewall and bottom S/C is proposed. The presented experimental results show that bad sidewall S/C of a-C film induces the Si edge damage in high aspect ratio device patterning. The proposed DOE will allow us to optimize the C2H2 base a-C process to improve the S/C by 49%–91% better than the unoptimized process. This helps to reduce the amount of device pattern damage significantly.