تجزیه و تحلیل عملکرد از دروازه تمام نوری NOR در 80 گیگا بایت/ثانیه

In this paper an ‘all optical NOR gate’ based on four wave mixing in Semiconductor Optical Amplifier is proposed. The performance of this NOR gate is good and satisfactory up to 100 Gbit/s. The extinction ratio and the maximum output power are optimized by appropriate choice of design parameters of SOA and the maximum extinction ratio 10.8 for this design has been obtained at 80 Gbit/s. Unlike the related research papers referred, this paper highlights both power level and time domain analysis of the proposed NOR gate.

Optical computing devices are evolving rapidly to satisfy the needs of the new broadband network, which is characterized by the diversified use of Internet and other multimedia applications. Optical computing devices include uses of wavelength conversion, demultiplexing, regeneration and storage techniques, etc., which will play a major role in the development of ultra-high speed optical network. The backbone of all these devices is all optical logic gates. All Boolean logic gates can be implemented using universal logic gates NOR and NAND gate. This paper describes design and performance analysis of all optical NOR gate using four wave mixing, third order non linearity in SOA. A characteristic feature of this nonlinear phenomenon is that it is very fast for the rise time; however, there is slow recovery corresponding to the band-to-band carrier recombination lifetime. This slow recovery response is filtered out by the wave length filter followed by SOA. Whenever FWM is generated in SOA, carrier signal, i.e. probe signal power will be distributed among the four waves and hence output will correspond to ‘0’ logic level otherwise carrier at the output will have high power corresponding to level ‘1’.

In this paper, the SOA based NOR gate is simulated at 10–100 Gbit/s in order to investigate the suitable operating conditions for the optimum performance of the gate in terms of extinction ratio and saturated output power. The obtained results show that the extinction ratio is maximum 10.8 dB at 80 Gb/s with SOA active region length of 0.5 mm, having the optical confinement factor 0.3 (Fig. 4). Further as observed in Fig. 3, the injection current also affects the extinction ratio and this gate gives maximum extinction ratio corresponding to 0.4 A injection current. Full-size image (10 K) Fig. 4. Variation of extinction ratio with length of active region. Figure options From the theoretical formula given above it is clear that length of SOA directly affects the optical power at the output of the band pass filter, which also has been verified by the results shown in Table 2 and Fig. 5. Optical confinement factor inversely affects the saturated output power of SOA but the effect is not so prominent at the output of band pass filter (Fig. 6). Time domain analysis of the proposed NOR gate as shown in Fig. 7, Fig. 8 and Fig. 9 also give satisfactory result in compliance with the truth table. Full-size image (10 K) Fig. 5. Variation of minimum and maximum output (for level ‘1’ and ‘0’) with length of active region of SOA. Figure options Full-size image (8 K) Fig. 6. Variation of minimum and maximum output (for level ‘1’ and ‘0’) with optical confinement factor. Figure options Full-size image (44 K) Fig. 7. Output bit sequence of NOR gate for inputs A = 000000000000 and B = 000011110000. Figure options Full-size image (38 K) Fig. 8. Output bit sequence of NOR gate for inputs A = 000000000000 and B = 111111111111. Figure options Full-size image (37 K) Fig. 9. Output bit sequence of NOR gate for inputs A = 000000000000 and B = 000000000000. Figure options NOR gate simulated here, being universal logic gate can be used as basic building block to analyze more complex all optical circuits such as: adders, flip flops, and binary counters. Moreover, SOA based optical logic gates are much preferred because the time taken in process is short, the optical power level for non linear operation of the constituent logic elements is relatively low and the integration and the cascadability of the logic devices is superior [6] and [7]. The design present in this paper is simple to integrate with other logic devices for implementing arithmetic devices, i.e. it can be integrated with XOR gate to implement all-optical binary half adder circuit. Related research papers referred have not mentioned both power level and time domain analysis of their proposed design as has been presented in this paper.