دانلود مقاله ISI انگلیسی شماره 81261
ترجمه فارسی عنوان مقاله

سنتز و بهینه سازی شتاب دهنده پردازش تصویر با استفاده از دانش دامنه

عنوان انگلیسی
Synthesis and optimization of image processing accelerators using domain knowledge
کد مقاله سال انتشار تعداد صفحات مقاله انگلیسی
81261 2015 13 صفحه PDF
منبع

Publisher : Elsevier - Science Direct (الزویر - ساینس دایرکت)

Journal : Journal of Systems Architecture, Volume 61, Issue 10, November 2015, Pages 646–658

ترجمه کلمات کلیدی
شتاب دهنده های سخت افزار؛ پردازش تصویر؛ سنتز؛ تولید کد
کلمات کلیدی انگلیسی
Hardware accelerators; Image processing; Synthesis; Code generation
پیش نمایش مقاله
پیش نمایش مقاله  سنتز و بهینه سازی شتاب دهنده پردازش تصویر با استفاده از دانش دامنه

چکیده انگلیسی

To address this design challenge in the domain of image processing, several approaches have been presented that introduce an additional layer of abstraction between the developer and the actual target hardware. One approach is to use a Domain-Specific Language (DSL) to generate highly optimized code for synthesis by general purpose High-Level Synthesis (HLS) frameworks. Another approach is to instantiate a generic VHDL IP-Core library for local imaging operators. Elevating the description of image algorithms to such a higher abstraction level can significantly reduce the complexity for designing hardware accelerators targeting FPGAs. We provide a comparison of results for both approaches, a non-expert algorithm developer can achieve. Furthermore, we present an automatic optimization process to give the algorithm developer even more control over trading execution time for resource usage, that could be applied on top of both approaches. To evaluate our optimization procedure, we compare the resulting FPGA accelerators to highly optimized Graphics Processing Unit (GPU) implementations of several image filters relevant for close-to-sensor image and video processing with stringent real-time constraints, such as in the automotive domain.