یک ترمیستور معمولی ولتاژ پویا با قابلیت محدود کردن جریان خطا

In this paper, a new topology of conventional dynamic voltage restorer (DVR) with fault current limiting capability is proposed. The structure uses a grid-tied transformer which is utilized for both supplying energy to the DVR, and revers voltage supply as a FCL function. In order to limit the fault current, a fast bidirectional switch is employed during fault condition to supply revers voltage to avoid high current levels. However, the ratio of transformer is consequential for the proper operation. Also, for decreasing power losses across isolation transformer and semiconductors, a switch is added to flow the current during normal state. The design methodology of the proposed structure is discussed and the results are carried out based on power systems computer aided design (PSCAD)/electromagnetic transients including dc (EMTDC) simulation.