دانلود مقاله ISI انگلیسی شماره 44390
ترجمه فارسی عنوان مقاله

بهینه سازی نقشه برداری خطای ماشین ابزار چندهدفه با استفاده از برنامه ریزی خودکار

عنوان انگلیسی
Multi-objective optimisation of machine tool error mapping using automated planning
کد مقاله سال انتشار تعداد صفحات مقاله انگلیسی
44390 2015 11 صفحه PDF
منبع

Publisher : Elsevier - Science Direct (الزویر - ساینس دایرکت)

Journal : Expert Systems with Applications, Volume 42, Issue 6, 15 April 2015, Pages 3005–3015

ترجمه کلمات کلیدی
نقشه برداری خطای ماشین - عدم قطعیت اندازه گیری - برنامه ریزی خودکار - PDDL - بهینه سازی چند هدفه
کلمات کلیدی انگلیسی
Machine tool error mapping; Uncertainty of measurement; Automated planning; PDDL; Multi-objective optimisation
پیش نمایش مقاله
پیش نمایش مقاله  بهینه سازی نقشه برداری خطای ماشین ابزار چندهدفه با استفاده از برنامه ریزی خودکار

چکیده انگلیسی

Error mapping of machine tools is a multi-measurement task that is planned based on expert knowledge. There are no intelligent tools aiding the production of optimal measurement plans. In previous work, a method of intelligently constructing measurement plans demonstrated that it is feasible to optimise the plans either to reduce machine tool downtime or the estimated uncertainty of measurement due to the plan schedule. However, production scheduling and a continuously changing environment can impose conflicting constraints on downtime and the uncertainty of measurement. In this paper, the use of the produced measurement model to minimise machine tool downtime, the uncertainty of measurement and the arithmetic mean of both is investigated and discussed through the use of twelve different error mapping instances. The multi-objective search plans on average have a 3% reduction in the time metric when compared to the downtime of the uncertainty optimised plan and a 23% improvement in estimated uncertainty of measurement metric when compared to the uncertainty of the temporally optimised plan. Further experiments on a High Performance Computing (HPC) architecture demonstrated that there is on average a 3% improvement in optimality when compared with the experiments performed on the PC architecture. This demonstrates that even though a 4% improvement is beneficial, in most applications a standard PC architecture will result in valid error mapping plan.