Low-voltage high-gain large-capacitive-load amplifiers in 90-nm CMOS technology
آشنایی با موضوع
تکنولوژی اکـسید نیمه هادی مکـمل یا(Complementary Metal Oxide Semiconductor) با عبارت اختصاری CMOS یک فناوری بزرگ در صنـعـت مـدارهای مـجـتـمع (IC) است و به عـنـوان مـحـصولاتـی با اتـلاف تـــوان کم و چگالی زیاد و وسیله سوییچ کـنندگی نسبتا ایـده آل شناخـته شـده است. استفاده از این تکنولوژی امروزه بسیار متداول شده است
در این صفحه، تعداد 81 مقاله انگلیسی از ژورنال ها و مجلات معتبر پایگاه ساینس دایرکت (ScienceDirect) درباره موضوع فناوری CMOS آرشیو شده است که شما می توانید مقالات مورد نظر خود را بر اساس سال انتشار، موضوع مقاله، وضعیت ترجمه و تعداد صفحات، انتخاب نموده و دانلود فرمایید.
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در صورتی که مقاله لاتین مورد نظر شما تا کنون به زبان فارسی ترجمه نشده باشد، واحد ترجمه پایگاه ISI Articles با همکاری تنی چند از اساتید و مترجمان با سابقه، آمادگی دارد آن را در اسرع وقت و با کیفیت مطلوب برای شما ترجمه نماید.
A new 0.35 μm CMOS electronic interface for wide range floating capacitive and grounded/floating resistive sensor applications
Low Thermal Budget Monolithic Integration of Evanescent-Coupled Ge-on-SOI Photodetector on Si CMOS Platform
A CMOS Inverter-Based Class-AB Pseudo Differential Amplifier for HF Applications
New Subthreshold Concepts in 65nm CMOS Technology
1-Bit Sub Threshold Full Adders in 65nm CMOS Technology
LECTOR: A Technique for Leakage Reduction in CMOS Circuits
High speed and low cost synchronous counter design in quantum-dot cellular automata
Study of capacitance nonlinearity in nano-scale multi-stage MOSFET-only sigma-delta modulators
A Content-Addressable Memory structure using quantum cells in nanotechnology with energy dissipation analysis
Design of ultra low power current mode logic gates using magnetic cells
Efficient parasitic-aware hybrid sizing methodology for analog and RF integrated circuits
Development of a low-cost sun sensor for nanosatellites
A new approach to frequency-domain noise analysis and design of a very-low noise amplifier in radio and microwave frequencies
Current conveyor-based differential capacitance analog interface for displacement sensing application
Sense amplifier comparator with offset correction for decision feedback equalization based receivers
An accurate 1-V threshold voltage reference for ultra-low power applications
An improved design and simulation of low-power and area efficient parallel binary comparator
High output dynamic range exponential function synthesizer
Low cost and highly reliable radiation hardened latch design in 65 nm CMOS technology ☆
Challenges of nickel silicidation in CMOS technologies ☆
Facet engineering for SiGe/Si stressors in advanced CMOS technology
A fully integrated dual-band VCO by 0.18 μm CMOS technologies
A new write assist technique for SRAM design in 65 nm CMOS technology
Ultra-low Offset Vertical Hall Sensor in CMOS Technology ☆
High linearity, low power RF mixer design in 65 nm CMOS technology
A new asymmetric 6T SRAM cell with a write assist technique in 65 nm CMOS technology
HKMG CMOS technology qualification: The PBTI reliability challenge
Electrical characterization of thulium silicate interfacial layers for integration in high-k/metal gate CMOS technology
High mobility CMOS technologies using III–V/Ge channels on Si platform
POSFET tactile sensing arrays using CMOS technology
High-speed photodiodes in 40 nm standard CMOS technology
Integration of NEMS resonators in a 65 nm CMOS technology
Modification of standard CMOS technology for cell-based biosensors
POSFET Tactile Sensing Arrays using CMOS Technology ☆
Passive mixer with OPA filter for DVB-H front-end in 65 nm digital CMOS technology
New configuration memory cells for FPGA in nano-scaled CMOS technology
Quasi-planar bulk CMOS technology for improved SRAM scalability
Visible and NIR integrated Phototransistors in CMOS technology
Investigation of triple-junction photodetector in 90 nm CMOS technology
New carbon-based thermal stability improvement technique for NiPtSi used in CMOS technology
Ultrathin DPN STI SiON liner for 40 nm low-power CMOS technology
Design of an L1 band low noise single-chip GPS receiver in 0.18 μ m CMOS technology
Ultra-high temperature (>300 °C) suspended thermodiode in SOI CMOS technology
Full-chip leakage analysis for 65 nm CMOS technology and beyond
Review of fuse and antifuse solutions for advanced standard CMOS technologies ☆
Prospect of the future of switched-current circuits with regard to future CMOS technologies
Analysis on the mutual inductance of planar transformer in CMOS technology
First Vertical Hall Device in standard 0.35 μm CMOS technology
Silicon nanowire sensor array using top–down CMOS technology
The Ge condensation technique: A solution for planar SOI/GeOI co-integration for advanced CMOS technologies?
Design and implementation of a capacitive fingerprint sensor circuit in CMOS technology
SrHfO3 as gate dielectric for future CMOS technology
Optimum bias of power transistor in 0.18 μm CMOS technology for Bluetooth application
A spice-like reliability model for deep-submicron CMOS technology
Sector split-drain magnetic field-effect transistor based on standard CMOS technology
Characterization of logic circuit techniques and optimization for high-leakage CMOS technologies ☆
Growth of lanthanum oxide films for application as a gate dielectric in CMOS technology
High-speed wavefront sensor compatible with standard CMOS technology
The development of scalable sensor arrays using standard CMOS technology
Characterization of symmetrical spiral inductor in 0.35 μm CMOS technology for RF application
Investigation of iridium as a gate electrode for deep sub-micron CMOS technology
Towards implementation of a nickel silicide process for CMOS technologies
Ultra-thin silicon nitride by hot wire chemical vapor deposition (HWCVD) for deep sub-micron CMOS technologies
Transistor optimisation for a low cost, high performance 0.13 μm CMOS technology