For the first time, a novel single halo dual-material gate carbon nanotube Field-Effect Transistors (CNTFETs) with doped source and drain extensions is proposed and simulated using quantum simulation. The simulations are based on two-dimensional non-equilibrium Green’s functions (NEGF) solved self-consistently with Poisson’s equations. Comparisons are made for electrical characteristics among four CNTFETs structures, which are conventional single-material-gate CNTFETs (C-CNTFETs), halo single-material-gate CNTFETs (HALO-CNTFETs), dual-material-gate CNTFETs (DMG-CNTFETs), and halo dual-material-gate CNTFETs (HALO-DMG-CNTFETs). The results show that the HALO-DMG structure decreases significantly the leakage current and increases on–off current ratio as well as cutoff frequency. It is also demonstrated that HALO-DMG structure possesses two perceivable steps in potential profile of the channel, which leads to another lateral electric field peak inside the channel, thus improve both carrier efficiency and the immunity against short-channel effects (SCE). Finally, the high-frequency characteristics of the CNTFETs have been discussed based on the channel vertical electric field distributions. The parasitic capacitance has a great influence on the cutoff frequency, and limits the RF performance of the device.
Carbon nanotubes Field-Effect Transistors (CNTFETs) are promising candidates for fundamental components in the future nanoelectronics. Compared to silicon counterparts, due to an exceptionally high mobility, and the near ballistic transport in the channel [1], CNTFETs can obtain higher driving current, faster operation speed and significant reduction in power consumption. These make CNTFETs extremely suitable for high performance CMOS circuit applications. For example, recent progress in CNTFETs has been reported that terahertz cutoff frequency can be achieved with high-frequency and low-noise transistor [2], [3] and [4].
The major limiting factor for CNTFETs downscaling is the so-called short-channel effects (SCE) which are caused by the increasing charge sharing from the source and drain. To alleviate this problem, different solutions have been proposed to enhance the immunity against SCE [5], [6], [7] and [8]. Among the possible solutions, dual-material-gate (DMG) structures have been proved to be the most efficient method to overcome the bottleneck of transport efficiency and SCE [9], [10], [11], [12] and [13]. Due to the discontinuity work function of the gate, this structure leads to potential step along the channel at the conjunction of different gate metals. As the drain potential changes, the step in potential increases, which provides a better shielding of the channel from the drain variation and results in an increase of average carrier velocity in the channel. Xiang et al. have achieved the preparation of a hetero-gate structure by chemical doping method [14]. Since the gate material may be substantially related to the metal and the oxide, preparation technology of hetero-material gate structure is entirely feasible in practical applications.
On the other hand, halo implantation is generally used to suppress threshold voltage roll-off, drain-induced barrier lowering, and to prevent punch through for CNTFETs, which is another method to increase carrier transport efficiency [15], [16], [17] and [18]. Besides that, halo structures can also help CNTFETs to achieve the modulation of electric field distributions and electrostatic potential along the channel, thus the devices will have better control of gate over the conductance of the channel.
In order to possess the advantages of both DMG and halo structures which can help reduce SCE and gate capacitance simultaneously, we propose a compound structure called halo dual-material-gate CNTFETs (HALO-DMG-CNTFETs). In this paper, we have investigated the effects of halo for conventional single-material-gate CNTFETs(C-CNTFETs) and DMG-CNTFETs, using two-dimensional numerical simulations, which are based on the self-consistent solution of the two-dimensional Green’s functions and Poisson equations. The results show that in the structure we have proposed, SCE are suppressed because of the perceivable steps in the surface potential, which screens the drain potential variation and the cutoff frequency can reach terahertz. However, parasitic capacitance has a great influence on the cutoff frequency, and limits the RF performance of the device.
The quantum transport performance of four CNTFETs structures, which are C-CNTFETs, HALO-CNTFETs, DMG-CNTFETs, and HALO-DMG-CNTFETs are theoretically studied based on the NEGF method of the many-body quantum. The simulation results show that in the HALO-DMG structure, due to the two perceivable steps in potential profile of the channel, the average lateral electric field peak under the gate increase, thus enhance the transport efficiency and suppress SCE. The cutoff frequencies of all the structures reach the terahertz level. When gate length increases, the cutoff frequency will reduce, which limits the RF performance of CNTFETs. Compared with the HALO-CNTFETs, in the HALO-DMG-CNTFETs structure, the average vertical electric field under the gate is weakened resulting in a larger cutoff frequency.
