مدیریت زمان چرخه در طول صعود فزاینده تولید

Aggressive capacity ramp rate of a semiconductor wafer fabrication is vital for the commercial success of the enterprise. Basic requirements are short and stable production cycle times to timely qualify equipment and to provide acceptable yield. Therefore, in the ramp-up environment which is characterized by high variability and uncertainty, an adequate methodology is required to properly manage the conflict of short cycle times and fast throughput increase. This paper presents a methodology to manage cycle time by closely monitoring and limiting the work in process (WIP), by means of the so-called “WIP caps”. Used consequently, this methodology allows the ramp rate to accelerate as soon as the factory performance enables this while keeping cycle times under control.

“Ramp-up” is the process of increasing production rate of a factory from the first lot to full volume. This occurs when a new product is introduced into a factory. The speed of the ramp-up strongly impacts the time-to-volume of a product and by that its financial success. On the one hand, product prices are at their highest early in the life cycle. On the other hand, the ramp-up phase itself may take already a considerable part of the products life cycle, since the life cycles of many products (especially within the semiconductor industry) are shortening and product generations are being replaced faster and faster. During the life cycle of a factory, ramp phases reoccur with each new product and product generation. But the initial ramp-up is the most difficult and challenging. Tools, technology and manufacturing processes have to be timely installed, qualified and matured to provide acceptable yield. All of those tasks are directly affected by the cycle time. Yield: An acceptable product yield is a prerequisite for volume production. On the one hand, it strongly influences the manufacturing costs; on the other hand, it limits the output of quality products and by that the revenue. Yield is also an indicator for process maturity. As long as the yield is low, extensive activities are required to improve the knowledge concerning the process. Thereby, learning is driven by two effects: Designed experiments help to solve specific problems, while the rate of production increases production experience [1]. Both effects strongly depend on cycle time because in many cases the analysis can only be done after finalizing the full process. The cycle time defines the duration of learning cycles and by that impacts heavily the learning speed.

Used consistently, this methodology causes the ramp rate to accelerate as soon as the factory performance permits this. However, it also provides clear rules when critical situations occur during ramp, such as late qualifications, tool downs, process problems, or, even line stops. As a result the cycle times are kept short and accelerate the yield improvement. With the methodology the manufacturing system is not only held in stable conditions. Moreover, it offers the opportunity of higher output and greater financial return. Further investigations should be done to analyze the trade-off between cycle time, yield and throughput to develop an optimal strategy for throughput and cycle time increase. It also should be investigated, how this active cycle time management impacts investment decisions. There is an effect on the factory's cash-flow, caused by the time of equipment delivery. Besides, short cycle times could be supported by additional equipment. In order to enable optimal decisions, these extra costs have to be evaluated in relation to the increased return by shortened cycle times.